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Power Design India - total search 18 articles sort by date sort by relevance
FPGA-based designs call for better noise immunity 2009-10-08
Today's FPGA-based designs require improved clocking with greater immunity to power supply switching noise observed in real-world applications  
Achieving cost savings in FPGA-to-ASIC conversion 2006-09-06
Planning an FPGA-to-ASIC conversion requires that the ASIC vendor is involved as early as possible in order to achieve the best cost savings  
Designing with high-performance FPGA 2008-11-04
Read about optimal packaging solutions for preserving power and signal integrity in FPGAs.  
Power-Sensitive Design Techniques On FPGA Devices 2001-07-03
Power-Sensitive Design Techniques On FPGA Devices  
Design power-aware FPGAs 2009-03-12
Read about FPGA architecture and features, and the power components associated with FPGAs  
Power considerations in designing with 90 nm FPGAs 2008-09-12
Reducing power in FPGA designs is a matter of making the right choices from the very beginning  
Flexible analysis lead to power integrity 2008-10-27
FPGA designs, rail analysis tools for ASICs and full-custom designs are suggested solutions to some power integrity issues  
Enable low power design with FPGAs 2009-10-19
Size and power considerations are often the top priority in many system designs, but portability and long-lasting power can become conflicting design requirements. So what does a design team do? FPGAs are the answer.  
Billion-transistor full-custom designs 2006-09-17
Read about power integrity issues in today's advanced designs and the unique challenges of full-custom designs.  
Fine tune point-of-load regulation in DTVs 2008-10-28
Read about Point-of-Load regulators and the unique requirements of bus termination voltages.  
Designing modern FPGAs' power supplies 2010-01-13
This article discusses in detail the considerations that you must consider when designing modern FPGAs' power supplies.  
I/O gating versus sleep modes 2006-09-20
Here are the differences between CPLDs with an I/O gating feature, and the "sleep modes" used by FPGAs.  
Design power-aware FPGAs, Part 3 2009-03-31
Here are some techniques to eliminate or reduce the propagation of unnecessary glitches.  
Design power-aware FPGAs, Part 2 2009-03-25
Learn why considering simple, single-cycle power numbers is misleading and even erroneous.  
Build an intelligent solar tracking system with FPGAs 2009-01-28
Read about this implementation of a prototypical solar tracking electricity generation system.  

Embedded Design India - total search 135 articles
Reap the benefits of a design preservation flow 2010-07-28
Implementing Virtual Line Crossing Detection 2010-07-20
Employing clock gating in ASIC, FPGA designs 2010-06-16
Enabling next-generation signal processing apps 2010-06-09
Moving to a discrete Serdes solution for 4G 2010-05-17
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EE Times India - total search 1003 articles
Linux-compliant OS targets SmartFusion devices 2010-08-25
Microcontroller enables 6ch closed-loop fan control 2010-08-25
RMS detector packs 12bit ADC for digital output 2010-08-24
Multi-core platform targets high intensity apps 2010-08-19
Start-up specialises in FPGA-based prototyping technology 2010-08-17
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